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1-1.1 Course Overview
21:05
2-1.2 Introduction to Heterogeneous Parallel Computing
16:58
3-1.3 Portability and Scalability in Heterogeneous Parallel Computing
09:26
4-1.4 Introduction to CUDA Data Parallelism and Threads
23:21
5-1.5 Introduction to CUDA Memory Allocation and Data Movement API
19:49
6-1.6 Introduction to CUDA Kernel-Based SPMD Parallel Programming
19:54
7-1.7 Kernel-based Parallel Programming Multidimensional Kernel Configuration
16:38
8-1.8 Kernel-based Parallel Programming Basic Matrix-Matrix Multiplication
18:18
9-2.1 Kernel-based Parallel Programming - Thread Scheduling
19:47
10-2.2 Control Divergence
14:46
11-2.3 Memory Model and Locality -- CUDA Memories
21:44
12-2.4 Tiled Parallel Algorithms
19:14
13-2.5 Tiled Matrix Multiplication
21:48
14-2.6 Tiled Matrix Multiplication Kernel
30:06
15-2.7 Handling Boundary Conditions in Tiling
14:57
16-2.8 A Tiled Kernel for Arbitrary Matrix Dimensions
18:05
17-3.1 Performance Considerations - DRAM Bandwidth
23:38
18-3.2 Performance Considerations - Memory Coalescing in CUDA
16:50
19-3.3 Parallel Computation Patterns - Convolution
15:26
20-3.4 Parallel Computation Patterns - Tiled Convolution
18:49
21-3.5 Parallel Computation Patterns - 2D Tiled Convolution Kernel
19:16
22-3.6 Parallel Computation Patterns - Data Reuse in Tiled Convolution
23:40
23-4.1 Parallel Computation Patterns - Reduction
22:57
24-4.2 Parallel Computation Patterns - A Basic Reduction Kernel
17:59
25-4.3 Parallel Computation Patterns - A Better Reduction Kernel
14:23
26-4.4 Parallel Computation Patterns - Scan (Prefix Sum)
20:33
27-4.5 Parallel Computation Patterns - A Work-Inefficient Scan Kernel
21:15
28-4.6 Parallel Computation Patterns - A Work-Efficient Parallel Scan Kernel
21:10
29-4.7 Parallel Computation Patterns - More on Parallel Scan
21:39
30-5.1 Parallel Computation Patterns - Histogramming
12:19
31-5.2 Parallel Computation Patterns - Atomic Operations
12:38
32-5.3 Parallel Computation Patterns - Atomic Operations in CUDA
17:32
33-5.4 Parallel Computation Patters - Atomic Operations Performance
15:48
34-5.5 Parallel Computation Patterns - A Privatized Histogram Kernel
13:34
35-6.1 Efficient Host-Device Data Transfer - Pinned Host Memory
20:07
36-6.2 Efficient Host-Device Data Transfer - Task Parallelism in CUDA
19:19
37-6.3 Efficient Host-Device Data Transfer - Overlapping Data Transfer with Comp
22:40
38-7.1 Related Programming Models - OpenCL Data Parallelism Model
15:08
39-7.2 Related Programming Models - OpenCL Device Architecture
09:49
40-7.3 Related Programming Models - OpenCL Host Code Part 1
23:29
41-7.4 Related Programming Models - OpenCL Host Code (Cont.)
14:00
42-7.5 Related Programming Models - OpenACC
16:28
43-7.6 Related Programming Models - OpenACC Details
16:07
44-8.1 Related Parallel Models - C++ AMP
15:59
45-8.2 Related Parallel Models - C++ AMP Advance Concepts
18:28
46-8.3 Related Parallel Models - Introduction to Heterogeneous Supercomputing an
21:24
47-8.4 Conclusions and Future Directions
19:46
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